An implementation of chaotic pseudo-random sequence generator based on pipelined architecture

Kai Feng, Xin Huang, Shu Chuan Chu, John F. Roddick, Qun Ding

Research output: Contribution to journalArticlepeer-review

3 Citations (Scopus)

Abstract

There are natural connections and structural similarities between the basic characteristics of chaotic systems and cryptology. The application of chaotic systems to data encryption has also become a trend. In this paper, a pipelined architecture is introduced in the design of Logistic chaotic system, which greatly improves the operating frequency of the system and finally realizes a high-speed chaotic pseudo-random sequence generator based on the pipelined architecture on the Xilinx Artix-7 series FPGA chip. The operation frequency has reached 296MHz, and achieves a throughput of 296Mbps.

Original languageEnglish
Pages (from-to)71-79
Number of pages9
JournalJournal of Network Intelligence
Volume4
Issue number2
Publication statusPublished - May 2019

Keywords

  • FPGA
  • Logisti system
  • Pipelined arhiteture
  • Pseudo-random sequene generator

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