An implementation of chaotic pseudo-random sequence generator based on pipelined architecture

There are natural connections and structural similarities between the basic characteristics of chaotic systems and cryptology. The application of chaotic systems to data encryption has also become a trend. In this paper, a pipelined architecture is introduced in the design of Logistic chaotic system, which greatly improves the operating frequency of the system and finally realizes a high-speed chaotic pseudo-random sequence generator based on the pipelined architecture on the Xilinx Artix-7 series FPGA chip. The operation frequency has reached 296MHz, and achieves a throughput of 296Mbps.