Memory and thread placement effects as a function of cache usage: A study of the Gaussian chemistry code on the SunFire X4600 M2

R. Yang, J. Antony, P. P. Janes, A. P. Rendell

Research output: Chapter in Book/Report/Conference proceedingConference contribution

16 Citations (Scopus)

Abstract

In this work we study the effect of cache blocking and memory/thread placement on a modern multicore shared memory parallel system, the SunFire X4600 Ml, using the Gaussian 03 computational chemistry code. A protocol for performing memory and thread placement studies is outlined, as is a scheme for characterizing a particular memory and thread placement pattern. Results for parallel Gaussian 03 runs with up to 16 threads are presented.

Original languageEnglish
Title of host publicationProceedings - 9th International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN 2008
Pages31-36
Number of pages6
DOIs
Publication statusPublished - 15 Aug 2008
Externally publishedYes
Event9th International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN 2008 - Sydney, NSW, Australia
Duration: 7 May 20089 May 2008

Conference

Conference9th International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN 2008
CountryAustralia
CitySydney, NSW
Period7/05/089/05/08

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  • Cite this

    Yang, R., Antony, J., Janes, P. P., & Rendell, A. P. (2008). Memory and thread placement effects as a function of cache usage: A study of the Gaussian chemistry code on the SunFire X4600 M2. In Proceedings - 9th International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN 2008 (pp. 31-36). [4520191] https://doi.org/10.1109/I-SPAN.2008.13