Memory and thread placement effects as a function of cache usage: A study of the Gaussian chemistry code on the SunFire X4600 M2

R. Yang; J. Antony; P. P. Janes; A. P. Rendell

doi:10.1109/I-SPAN.2008.13

Memory and thread placement effects as a function of cache usage: A study of the Gaussian chemistry code on the SunFire X4600 M2

R. Yang
, J. Antony
, P. P. Janes
, A. P. Rendell

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

17 Citations (Scopus)

Abstract

In this work we study the effect of cache blocking and memory/thread placement on a modern multicore shared memory parallel system, the SunFire X4600 Ml, using the Gaussian 03 computational chemistry code. A protocol for performing memory and thread placement studies is outlined, as is a scheme for characterizing a particular memory and thread placement pattern. Results for parallel Gaussian 03 runs with up to 16 threads are presented.

Original language	English
Title of host publication	Proceedings - 9th International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN 2008
Pages	31-36
Number of pages	6
DOIs	https://doi.org/10.1109/I-SPAN.2008.13
Publication status	Published - 15 Aug 2008
Externally published	Yes
Event	9th International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN 2008 - Sydney, NSW, Australia Duration: 7 May 2008 → 9 May 2008

Conference

Conference	9th International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN 2008
Country/Territory	Australia
City	Sydney, NSW
Period	7/05/08 → 9/05/08

Access to Document

10.1109/I-SPAN.2008.13Licence: In Copyright

Cite this

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title = "Memory and thread placement effects as a function of cache usage: A study of the Gaussian chemistry code on the SunFire X4600 M2",

abstract = "In this work we study the effect of cache blocking and memory/thread placement on a modern multicore shared memory parallel system, the SunFire X4600 Ml, using the Gaussian 03 computational chemistry code. A protocol for performing memory and thread placement studies is outlined, as is a scheme for characterizing a particular memory and thread placement pattern. Results for parallel Gaussian 03 runs with up to 16 threads are presented.",

author = "R. Yang and J. Antony and Janes, \{P. P.\} and Rendell, \{A. P.\}",

year = "2008",

month = aug,

day = "15",

doi = "10.1109/I-SPAN.2008.13",

language = "English",

isbn = "9780769531250",

pages = "31--36",

booktitle = "Proceedings - 9th International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN 2008",

note = "9th International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN 2008 ; Conference date: 07-05-2008 Through 09-05-2008",

}

Yang, R, Antony, J, Janes, PP & Rendell, AP 2008, Memory and thread placement effects as a function of cache usage: A study of the Gaussian chemistry code on the SunFire X4600 M2. in Proceedings - 9th International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN 2008., 4520191, pp. 31-36, 9th International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN 2008, Sydney, NSW, Australia, 7/05/08. https://doi.org/10.1109/I-SPAN.2008.13

Memory and thread placement effects as a function of cache usage: A study of the Gaussian chemistry code on the SunFire X4600 M2. / Yang, R.; Antony, J.; Janes, P. P. et al.
Proceedings - 9th International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN 2008. 2008. p. 31-36 4520191.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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T2 - 9th International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN 2008

AU - Yang, R.

AU - Antony, J.

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AB - In this work we study the effect of cache blocking and memory/thread placement on a modern multicore shared memory parallel system, the SunFire X4600 Ml, using the Gaussian 03 computational chemistry code. A protocol for performing memory and thread placement studies is outlined, as is a scheme for characterizing a particular memory and thread placement pattern. Results for parallel Gaussian 03 runs with up to 16 threads are presented.

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BT - Proceedings - 9th International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN 2008

Y2 - 7 May 2008 through 9 May 2008

ER -

Memory and thread placement effects as a function of cache usage: A study of the Gaussian chemistry code on the SunFire X4600 M2

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