Residual stresses in micro-structures fabricated by the IC-compatible sacrificial layer technique

In fabricating three dimensional micro-mechanical structures on silicon substrates, the IC-compatible sacrificial layer technique is widely adopted. This technique involves three basic stages, namely, depositing, annealing followed by cooling, and etching. Residual stresses develop during the cooling and etching stages, as a result of the mismatch in the thermal-mechanical properties of the coated layers and the substrate. In this study, a numerical simulation of the etching process is carried out and the distribution of residual stresses in the folded-beam suspension of a micro-actuator during etching is obtained. The sacrificial layer is divided into five sub-layers, and the etching process is simulated by a consecutive removal of each layer top down towards the substrate. For each sub-layer that is removed, the redistribution of residual stresses in the micro-structure is calculated, and the final residual stresses residing there are obtained after the entire sacrificial layer is removed. Results have indicated that, in general, the normal stress components are predominant. Whilst the final stresses are significantly reduced, partial removal of the sacrificial layer during etching may actually cause a noticeable increase in the residual stresses, thereby encouraging the growth of pre-existing defects.