Split Wisely: When Work Partitioning is Energy-Optimal on Heterogeneous Hardware

Gaurav Mitra, Andrew Haigh, Anish Varghese, Luke Angove, Alistair P. Rendell

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Citations (Scopus)

Abstract

Heterogeneous System-on-Chip (SoC) processors are increasingly gaining traction in the High Performance Computing (HPC) community as alternate building blocks for future exascale systems. Key issues relating to their promise of energy efficiency include i) absolute performance, ii) finding an energy-optimal balance in the use of different on-chip devices and iii) understanding the performance-energy trade-offs while using different on-chip devices. In this paper we explore these issues through an energy usage model designed to predict the existence of an energy-optimal work partition between different processing elements on heterogeneous systems for any application. We validate our model by measuring performance and energy consumption of matrix multiplication on the NVIDIA Tegra K1 and X1 systems. An environment for monitoring and responding to energy usage is also outlined and used to perform high resolution measurements. Comparisons are drawn with conventional HPC systems housing Intel Xeon CPUs alongside NVIDIA GPUs.

Original languageEnglish
Title of host publicationProceedings
Subtitle of host publication18th IEEE International Conference on High Performance Computing and Communications, 14th IEEE International Conference on Smart City and 2nd IEEE International Conference on Data Science and Systems, HPCC/SmartCity/DSS 2016
EditorsLaurence T. Yang, Jinjun Chen
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages781-788
Number of pages8
ISBN (Electronic)9781509042968
DOIs
Publication statusPublished - 20 Jan 2017
Externally publishedYes
Event18th IEEE International Conference on High Performance Computing and Communications, 14th IEEE International Conference on Smart City and 2nd IEEE International Conference on Data Science and Systems, HPCC/SmartCity/DSS 2016 - Sydney, Australia
Duration: 12 Dec 201614 Dec 2016

Publication series

NameProceedings - 18th IEEE International Conference on High Performance Computing and Communications, 14th IEEE International Conference on Smart City and 2nd IEEE International Conference on Data Science and Systems, HPCC/SmartCity/DSS 2016

Conference

Conference18th IEEE International Conference on High Performance Computing and Communications, 14th IEEE International Conference on Smart City and 2nd IEEE International Conference on Data Science and Systems, HPCC/SmartCity/DSS 2016
CountryAustralia
CitySydney
Period12/12/1614/12/16

Keywords

  • Energy efficiency
  • Energy usage model
  • Haswell
  • Intel
  • K20
  • K80
  • Load balancing
  • NVIDIA
  • Power Measurement
  • Sandy bridge
  • SoC
  • Tegra K1
  • Tegra X1
  • UCurrent

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